|
Verilog |
4 |
ColecoVision console for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
5 |
Sinclair QL for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Scala |
4 |
SpinalHDL ULX3S examples |
Jul 18, 2022 |
|
VHDL |
12 |
ulx3s ghdl examples |
Sep 17, 2022 |
|
Python |
26 |
Board and connector definition files for nMigen |
May 20, 2022 |
|
VHDL |
2 |
VHDL examples for the Ulx3s ECP5 FPGA |
Jul 18, 2022 |
|
Verilog |
9 |
A blinky project for the ULX3S v3.0.3 FPGA board |
Aug 26, 2021 |
|
Verilog |
2 |
Sega SG-1000 console for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
3 |
Template for Z80 computer on the Ulx3s FPGA board |
Jul 18, 2022 |
|
Verilog |
4 |
Version of Ice40Beeb for Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
8 |
Minimal ZX Spectrum for Ulx3s ECP5 board |
Jul 18, 2022 |
|
OpenSCAD |
2 |
PCB for ULX3S FPGA R&D board |
Jul 17, 2022 |
|
Verilog |
2 |
Altair 8800 on the Ulx3s ECP5 FPGA board |
Jul 18, 2022 |
|
None |
16 |
Retro computing on the Ulx3s ECP5 FPGA board |
Jul 18, 2022 |
|
Verilog |
5 |
The Amstrad CPC on the Ulx3s Ecp5 FPGA board |
Jul 18, 2022 |
|
Python |
13 |
Some assorted examples of nmigen designs |
Mar 30, 2023 |
|
Verilog |
4 |
Minimal Commodore Vic 20 core for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Python |
7 |
Example code for Blackice MX board written in nmigen |
Jul 18, 2022 |
|
Python |
9 |
Collection of various ulx3s examples |
Jan 06, 2021 |
|
Verilog |
3 |
MSX 8-bit computers on the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
5 |
Experiments with the 68000 CPU on the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Assembly |
2 |
TRS 80 Model 1 Verilog implementation for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
SystemVerilog |
2 |
NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board |
Oct 24, 2022 |
|
None |
13 |
Information on cores available on the Ulx3s ECP5 FPGA board |
Jul 18, 2022 |
|
Verilog |
2 |
A port of the Ice40CPMZ80 project to the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
4 |
The AY-3-8500 Pong-on-a-chip for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
14 |
Simple 6502 system on a ULX3S FPGA board |
May 03, 2023 |
|
Python |
4 |
Testing scripts for https://github.com/nmigen/nmigen-boards |
Jul 23, 2022 |
|
None |
2 |
Experiments with the PDP 11 instruction set on the Ulx3s Ecp5 FPGA board |
Oct 20, 2023 |
|
Verilog |
13 |
A template project for the ULX3S ECP5 FPGA board using only Open Source Software |
Aug 02, 2022 |
|
Verilog |
2 |
The TRS-80 Model 1 for the Ulx3s FPGA Ecp5 board, created from the Z80 template |
Jul 18, 2022 |
|
Verilog |
2 |
Jupiter Ace for the Ulx3s |
Feb 03, 2023 |
|
Verilog |
10 |
Verilog design files and Icestudio file for streaming the OV7670 camera using ULX3S FPGA Board |
Jun 16, 2022 |
|
Verilog |
11 |
ZX80/81 implementation for the Ulx3s |
Jul 18, 2022 |
|
Scala |
11 |
Chisel Examples for the iCESugar FPGA Board |
Mar 31, 2023 |
|
Verilog |
2 |
Verilog examples for the Ulx4M FPGA board |
Jul 18, 2022 |
|
C |
2 |
Examples using the PIMORONI Badger2040 board |
Jan 05, 2024 |
|
Python |
4 |
Amaranth HDL examples for the Ulx4m FPGA board |
Jul 18, 2022 |
|
Verilog |
3 |
Examples for the mystorm blackice open FPGA board |
Mar 05, 2019 |
|
Python |
598 |
A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen |
Aug 10, 2022 |
|
C++ |
2 |
Examples for Step FPGA board |
Jul 17, 2020 |
|
HTML |
33 |
PMOD boards for ULX3S |
Apr 18, 2023 |
|
Python |
11 |
Industry standard I/O for nMigen |
Apr 24, 2021 |
|
Python |
16 |
System on Chip toolkit for nMigen |
Nov 10, 2021 |
|
Python |
22 |
Polyglot examples for the 01Space ESP32-C3FH4-RGB board |
Jul 16, 2022 |
|
Rust |
6 |
Rust examples adapted for the ST NUCLEO-F302R8 Board |
Jun 05, 2022 |
|
C |
2 |
Examples for the Due compatible Flip and Click Board |
Jan 30, 2023 |
|
None |
3 |
MicroPython Examples For 01Studio Development Board |
Apr 14, 2023 |
|
None |
3 |
PS-PL Examples for ZC702 Board |
Oct 19, 2021 |
|
Rust |
11 |
Examples programs for nucleo-h743zi board |
Apr 14, 2023 |