|
Verilog |
2 |
Altair 8800 on the Ulx3s ECP5 FPGA board |
Jul 18, 2022 |
|
Verilog |
5 |
The Amstrad CPC on the Ulx3s Ecp5 FPGA board |
Jul 18, 2022 |
|
SystemVerilog |
2 |
NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board |
Oct 24, 2022 |
|
None |
13 |
Information on cores available on the Ulx3s ECP5 FPGA board |
Jul 18, 2022 |
|
Verilog |
6 |
Macintosh 128 on the Ulx3s ECP5 FPGA |
Aug 08, 2022 |
|
VHDL |
2 |
VHDL examples for the Ulx3s ECP5 FPGA |
Jul 18, 2022 |
|
None |
2 |
Experiments with the PDP 11 instruction set on the Ulx3s Ecp5 FPGA board |
Oct 20, 2023 |
|
Verilog |
4 |
ColecoVision console for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
5 |
Sinclair QL for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
4 |
Sega Master System for Ulx3s ECP5 FPGA |
Jul 18, 2022 |
|
Verilog |
13 |
A template project for the ULX3S ECP5 FPGA board using only Open Source Software |
Aug 02, 2022 |
|
Verilog |
4 |
Version of Ice40Beeb for Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
8 |
Minimal ZX Spectrum for Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
2 |
The TRS-80 Model 1 for the Ulx3s FPGA Ecp5 board, created from the Z80 template |
Jul 18, 2022 |
|
Verilog |
2 |
Sega SG-1000 console for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
3 |
MSX 8-bit computers on the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
5 |
Experiments with the 68000 CPU on the Ulx3s ECP5 board |
Jul 18, 2022 |
|
C |
19 |
ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5) |
Feb 28, 2023 |
|
Verilog |
4 |
Minimal Commodore Vic 20 core for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
2 |
A port of the Ice40CPMZ80 project to the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Assembly |
2 |
TRS 80 Model 1 Verilog implementation for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
6 |
Test projects for the OrangeCrab ECP5 FPGA board |
May 12, 2022 |
|
OpenSCAD |
2 |
PCB for ULX3S FPGA R&D board |
Jul 17, 2022 |
|
Verilog |
4 |
FPGA bitcoin miner for the Lattice ECP5 evaluation board. |
Apr 28, 2022 |
|
Verilog |
10 |
Projects for the ECPiX-5 - a ECP5 FPGA board. |
Mar 18, 2022 |
|
Verilog |
4 |
The AY-3-8500 Pong-on-a-chip for the Ulx3s ECP5 board |
Jul 18, 2022 |
|
Verilog |
9 |
A blinky project for the ULX3S v3.0.3 FPGA board |
Aug 26, 2021 |
|
Verilog |
3 |
Template for Z80 computer on the Ulx3s FPGA board |
Jul 18, 2022 |
|
Verilog |
14 |
Simple 6502 system on a ULX3S FPGA board |
May 03, 2023 |
|
None |
14 |
Bit streams forthe Ulx3s ECP5 device |
Jul 18, 2022 |
|
Verilog |
2 |
Code and tools related to ECP5 Lattice evaluation FPGA board |
Mar 05, 2023 |
|
Verilog |
3 |
FPGA Odysseus with ULX3S |
Jul 17, 2022 |
|
None |
3 |
Bitstreams for the Ulx4m ECP5 FPGA module |
Oct 19, 2023 |
|
Python |
3 |
FPGA class for ECP5 boards |
May 21, 2023 |
|
Verilog |
2 |
My projects for ULX3S FPGA |
Nov 13, 2019 |
|
Python |
10 |
nMigen examples for the ULX3S board |
Jul 18, 2022 |
|
KiCad Layout |
100 |
Logicbone ECP5 Development Board |
Dec 28, 2022 |
|
ANTLR |
80 |
Ultimate ECP5 development board |
Jul 22, 2022 |
|
Verilog |
10 |
Verilog design files and Icestudio file for streaming the OV7670 camera using ULX3S FPGA Board |
Jun 16, 2022 |
|
Go |
17 |
The retro-computing systems |
Dec 07, 2022 |
|
Nix |
2 |
Nix packages for ULX3s FPGA development |
Feb 14, 2021 |
|
HTML |
47 |
ECP5 FPGA in an "S7 Mini" form factor |
Aug 10, 2022 |
|
Shell |
2 |
ULX3S FPGA, RISC-V, ESP32 toolchain installer scripts |
Oct 19, 2020 |
|
Verilog |
6 |
Verilog design files and Icestudio file for Sobel Edge Detection with OV7670 camera using ULX3S … |
Jun 16, 2022 |
|
Assembly |
22 |
Retro Z80 CPU Board |
Aug 08, 2022 |
|
Verilog |
2 |
Brot FPGA Board |
Dec 17, 2022 |
|
HTML |
6 |
Modular FPGA board |
Aug 23, 2022 |
|
Verilog |
2 |
Kröte FPGA Board |
Oct 01, 2023 |
|
None |
16 |
Awesome List of Retro Computing |
May 27, 2023 |
|
C++ |
3 |
MetroComputer for an fpga. Retro, modernized. |
Mar 03, 2019 |