|
VHDL |
4 |
Common CORE of Network Development Kit (NDK) |
Feb 18, 2023 |
|
VHDL |
2 |
Silicom FB4CGG3/FB2CGG3 card for Network Development Kit (NDK) |
Feb 03, 2023 |
|
C |
3 |
Linux driver and SW tools for Network Development Kit (NDK) |
Apr 13, 2023 |
|
C++ |
2 |
Application Development Kit |
Jan 17, 2020 |
|
Python |
2 |
A research repo for the NDK (Neurotech Development Kit) project |
May 04, 2023 |
|
Python |
3 |
Software Development Kit for Application Development |
Aug 20, 2022 |
|
JavaScript |
2 |
A minimal Redux application starter kit, based on Zooniverse React Starterify. |
Jul 04, 2019 |
|
Java |
19 |
Maven Plugin for Android Application Development with the NDK |
Dec 07, 2021 |
|
Java |
15 |
Minimal asynchronous network application framework |
Apr 27, 2023 |
|
JavaScript |
20 |
Mobile Application Development Kit / MVC Framework |
Nov 12, 2022 |
|
C |
6 |
mikroSDK - portable embedded application development kit |
Sep 25, 2022 |
|
Python |
7 |
Application Development Kit for Quantum Network Explorer. Command Line Interface to interact with the Quantum … |
Mar 13, 2023 |
|
C |
113 |
Android NDK Game Development Cookbook |
Apr 29, 2022 |
|
Java |
6 |
Android - colouring images using android native development kit (NDK) c++.using algorithm is floodfill algorithm |
Jan 07, 2021 |
|
PHP |
2 |
Minimal Importer Kit. |
Apr 14, 2021 |
|
C |
3 |
Development of an application running Internet communication based on a STM32F4 Discovery kit. |
Sep 01, 2023 |
|
Forth |
2 |
A Forth-based Game Boy development kit |
Jan 04, 2019 |
|
TypeScript |
4 |
Angular based development kit (Builders, Schematics, etc.) |
Mar 05, 2021 |
|
SystemVerilog |
4 |
Moving Average |
Jan 28, 2022 |
|
SystemVerilog |
4 |
Collaborative project to create an advanced GPU for the Microcom computer. |
Jun 12, 2022 |
|
SystemVerilog |
4 |
SystemVerilog HDMI encoder, serializer & PLL generator. Tested on Cyclone IV-E, Compatible with Quartus 13.0 … |
May 25, 2022 |
|
SystemVerilog |
4 |
This example .BMP generator and ASCII script file reader can be adapted to test code … |
May 25, 2022 |
|
SystemVerilog |
4 |
FPGA low latency 10GBASE-R PCS |
May 19, 2022 |
|
SystemVerilog |
4 |
A continually growing system verilog parts library |
Dec 09, 2021 |
|
SystemVerilog |
4 |
基于FPGA的CNN图像分类系统 |
May 06, 2022 |
|
SystemVerilog |
4 |
Intel CPU Garage Challenge |
Jun 13, 2022 |
|
SystemVerilog |
4 |
system verilog course labs |
Nov 09, 2021 |
|
SystemVerilog |
4 |
Hardware-Software codesign project. |
Dec 12, 2021 |
|
SystemVerilog |
4 |
Verilog code for a simple synth module; developed on TinyFPGA BX |
Jul 18, 2022 |
verilator-dynamic-scheduler-tests
|
SystemVerilog |
4 |
None |
Mar 04, 2022 |
|
SystemVerilog |
4 |
まともなRISC-V CPU |
Jul 18, 2022 |
|
SystemVerilog |
4 |
Goal: Write an even higher performing solution generator |
Feb 22, 2021 |
|
SystemVerilog |
4 |
Verification IP for APB protocol |
Jul 30, 2022 |
|
SystemVerilog |
4 |
None |
Aug 07, 2022 |
|
SystemVerilog |
4 |
None |
Jan 21, 2022 |
|
SystemVerilog |
4 |
RISC-V Core Local Interrupt Controller (CLINT) |
Jul 14, 2022 |
|
SystemVerilog |
4 |
None |
Feb 17, 2022 |
|
SystemVerilog |
4 |
IP Blocks to Support Design, Prototyping, and Verification of PULP on FPGAs |
Feb 07, 2022 |
|
SystemVerilog |
4 |
Heterogeneous Cluster Interconnect to bind special-purpose HW accelerators with general-purpose cluster cores |
Jun 15, 2022 |
|
SystemVerilog |
4 |
Neural Engine, 16 input channels |
Jul 18, 2022 |
|
SystemVerilog |
4 |
None |
Jun 29, 2022 |
|
SystemVerilog |
4 |
None |
Mar 30, 2022 |
|
SystemVerilog |
4 |
None |
Jun 05, 2022 |
|
SystemVerilog |
4 |
None |
Sep 17, 2020 |
|
SystemVerilog |
4 |
A simulated memory controller for use in FPGA designs that want to model real system … |
Jul 12, 2021 |
|
SystemVerilog |
4 |
Financial Technology with SoC-NTM verified with UVM/OSVVM/FV |
Jul 19, 2022 |
|
SystemVerilog |
4 |
A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA) |
Aug 06, 2022 |
|
SystemVerilog |
4 |
RISC-V assembler/dis-assembler written in SystemVerilog |
Nov 18, 2020 |
|
SystemVerilog |
5 |
🎓 Repositório com as atividades desenvolvidas ao longo da disciplina de laboratório de organização e … |
Jun 01, 2022 |
|
SystemVerilog |
5 |
8086-compatible cpu |
May 06, 2022 |