|
C++ |
3 |
Designed a 32-bit RISC processor and a native compiler for running programs specified in High … |
Apr 03, 2023 |
|
C++ |
4 |
DUTH RISC V Microprocessor for High Level Synthesis |
Mar 01, 2023 |
|
Verilog |
2 |
32 bit RISC Processor |
Jun 11, 2021 |
|
Verilog |
17 |
32-bit RISC processor |
May 16, 2022 |
|
Verilog |
5 |
Simple Pipelined 32 bit RISC Processor |
Jul 16, 2022 |
|
SystemVerilog |
9 |
64-bit multicore RISC-V processor |
Aug 05, 2022 |
|
CMake |
8 |
High-Level Synthesis with Partial Evaluation |
Jan 13, 2022 |
|
Python |
247 |
A 32-bit RISC-V soft processor |
Jun 12, 2022 |
|
Python |
2 |
A 32-bit RISC-V soft processor |
Feb 28, 2023 |
|
Verilog |
3 |
Verilog implementation of the 32-bit RISC processor. |
May 23, 2022 |
|
MLIR |
2 |
HIR high-level synthesis compiler |
Feb 24, 2023 |
|
C++ |
4 |
Recursion for High Level Synthesis |
Jun 27, 2021 |
|
Scala |
2922 |
Open-source high-performance RISC-V processor |
Aug 15, 2022 |
|
None |
2 |
Open-source high-performance RISC-V processor |
Jun 15, 2022 |
|
Scala |
2 |
Open-source high-performance RISC-V processor |
Jul 12, 2023 |
|
Batchfile |
4 |
32-Bit RISC inspired Processor with Von Neumann Architecture using Logisim |
May 21, 2022 |
|
Assembly |
48 |
A 32-bit RISC-V processor for mriscv project |
Jun 03, 2022 |
|
VHDL |
2 |
A RISC/CISC 32 bit softcore processor in VHDL |
Dec 23, 2022 |
|
C++ |
2 |
Utopia: a High-Level Synthesis framework |
Nov 22, 2023 |
|
C++ |
5 |
An emulator for a 16-bit MIPS-style RISC processor |
Jan 10, 2020 |
|
Verilog |
2 |
32-bit RISC Processor design using Harvard Architecture in Verilog. |
May 05, 2022 |
|
Rust |
4 |
Low level access to SiFive RISC-V processor cores |
Oct 14, 2022 |
|
Verilog |
2 |
An implementation of a RISC 16-bit processor with custom Datapath and Controller. |
Jun 23, 2022 |
|
C |
79 |
Common high-level interface to speech synthesis |
Sep 12, 2022 |
|
SystemVerilog |
6 |
diablo is an Out-Of-Order 64-bit RISC-V processor |
May 05, 2023 |
|
SystemVerilog |
2 |
An implementation of Risc-V and my first 32-bit processor. |
Dec 06, 2023 |
|
C++ |
8 |
Vivado High Level Synthesis framework for Global Correlator |
Jun 27, 2021 |
|
MLIR |
139 |
A scalable High-Level Synthesis framework on MLIR |
Apr 25, 2023 |
|
Python |
86 |
Polyphony is Python based High-Level Synthesis compiler. |
May 28, 2022 |
|
CMake |
4 |
A Comprehensive Dataflow Compiler for High-Level Synthesis |
May 11, 2022 |
|
C++ |
15 |
Fast Floating Point Operators for High Level Synthesis |
May 04, 2023 |
|
VHDL |
7 |
VHDL implementation of a 16-bit RISC processor targeting the BASYS3 FPGA |
Apr 25, 2021 |
|
Verilog |
2 |
RV32E201X is a 5-stage pipelined 32-bit RISC-V processor core. |
Dec 15, 2023 |
|
VHDL |
2 |
Application Acceleration with High-Level Synthesis (AAHLS) - National Taiwan University, 2021 Fall |
Mar 28, 2022 |
|
C++ |
8 |
Compiler for a high-level hardware description language with automatic pipeline synthesis |
Nov 20, 2022 |
|
Assembly |
57 |
Configurable RISC-V Processor |
Mar 20, 2023 |
|
C |
7 |
RISC-V processor model |
May 15, 2023 |
|
Assembly |
2 |
Configurable RISC-V Processor |
Jul 06, 2023 |
|
Rust |
106 |
High level server designed to be used with axum framework. |
May 07, 2023 |
|
Verilog |
3 |
8-Bit Processor |
Jun 30, 2021 |
|
None |
6 |
A collection of URLs related to High Level Synthesis (HLS). |
Jan 17, 2022 |
|
None |
5 |
A fast, accurate trace-based simulator for High-Level Synthesis. |
May 10, 2023 |
|
None |
4 |
Discussion Forum for High-Level Synthesis (HLS) Courses in Taiwan. |
Apr 28, 2023 |
|
Verilog |
2 |
Contains some TCL scriping language excercises + 2 university contests on HIgh Level Synthesis (winner … |
Apr 05, 2023 |
|
Python |
5 |
:tophat: :magic_wand: high-level image operations, with a bit of magic. :rabbit: |
Apr 13, 2023 |
|
Verilog |
2 |
8 bit adder synthesis with Design compiler |
Dec 23, 2021 |
|
Verilog |
3 |
32 Bits RISC-V Processor with Approximate Functions |
Jun 27, 2023 |
|
Lua |
2 |
bit operations for synthesis |
Oct 20, 2013 |
|
Verilog |
6 |
Single Cycle RISC MIPS Processor |
Mar 06, 2022 |
|
Verilog |
2 |
Simple RISC-V processor project |
Dec 20, 2020 |