seven_segment_seconds

Demo project for Zero to ASIC course & presentations

Stars

5

Forks

1

Language

Verilog

Last Updated

Feb 23, 2024

Similar Repos
Repo Language Stars Description Updated At
Verilog 7 Demo project for the Zero to ASIC Course. Jun 10, 2022
Verilog 3 Template project for the Zero to ASIC course group ASIC application May 24, 2022
Verilog 3 MPW6 submission from the Zero to ASIC Course Jul 02, 2022
Verilog 12 Zero to ASIC group submission for MPW2 Mar 17, 2022
C# 2 ng2 Demo Project used in ArchitectNow presentations Jun 17, 2016
HTML 53 Demo presentations for reveal.js Apr 13, 2023
None 6 Presentations about zero-knowledge proofs Oct 12, 2022
None 3 demo project for ansible advanced course Feb 24, 2021
TypeScript 7 Project from course "NestJS Zero to Hero" Jun 09, 2022
JavaScript 3 Project done from zero to mastery course Apr 04, 2023
TSQL 10 Presentations and demo files Apr 29, 2023
Clojure 8 Zero Install Calva + Gitpod + VNC + deps.edn demo project Mar 15, 2022
Jupyter Notebook 2 Week zero course Oct 01, 2021
Go 2 kubernetes dev course operator project demo Feb 19, 2023
Java 4 Demo app for course Gradle Multi-Project Masterclass May 23, 2022
TypeScript 2 Nextflix - Practice Project for Next.js course by Zero To Mastery (ZTM) Mar 28, 2024
Cuda 11 Slides and demo code for past presentations Aug 09, 2022
PHP 2 A PHP Socket Chat Demo for networking course project Mar 05, 2019
JavaScript 3 zero To Mastery Course Apr 04, 2023
PowerShell 6 Slides, Code and Demo for all my presentations Apr 10, 2023
JavaScript 7 Slides and demo code from presentations Jul 19, 2016
JavaScript 2 Presentations for the Digital Academy Open Source Software Course Oct 09, 2019
None 6 Lessons and presentations for the Linux course at Hackafe Dec 09, 2020
Go 8 IPT Course Golang Programming examples and presentations Mar 10, 2022
Java 13 Part of a Web on Reactive Stack (Spring Framework and Project Reactor) demo for presentations Aug 19, 2022
JavaScript 11 Demo for egghead.io course Sep 04, 2023
HTML 8 HTML/CSS/JS boilerplate for presentations with impress.js – Demo: Nov 16, 2021
JavaScript 17 Course demo Aug 09, 2021
PowerShell 6 Slides and demo code from various presentations Mar 05, 2023
TypeScript 2 :page_with_curl: Repository with the project developed in NestJS Zero to Hero course Aug 28, 2020
None 5 Vadim Ksendzov's QA Course | My Testing Theory Presentations Jan 03, 2022
Verilog 3 SJTU CS145 Computer Architecture Labs. Apr 08, 2022
Verilog 4 This is the design experiment of a third-year computer composition principle course in a university. … Mar 15, 2021
Verilog 4 Skywater 130nm LDO parts and DPLL May 03, 2022
    CREME_DIGITAL
Verilog 4 None Apr 11, 2022
Verilog 4 [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs Mar 27, 2022
Verilog 4 UVM Testbench for Keccak sha3 core downloaded from Opencores https://opencores.org/projects/sha3 Mar 30, 2022
    axi4lite_sha3
Verilog 4 None Jun 02, 2022
Verilog 4 Comprehensive hardware library in Verilog for hardware primitives Oct 30, 2021
Verilog 4 Verilog RS232 Enhanced Synch-UART & RS232 Debugger HDL core with PC host RS232 real-time Hex-editor … May 25, 2022
    RealCPU
Verilog 4 None Jun 07, 2022
    cpu
Verilog 4 None Jan 04, 2022
Verilog 4 FIFO implementation with different clock domains for read and write. Jun 16, 2022
Verilog 4 鉴于网上RISC v版单周期CPU完整资料较少，基本无能够直接运行版本，上传代码，仅供大家参考。相关问题可以联系作者[email protected]。 Jul 05, 2022
    caravel-LoesterSoC
Verilog 4 None Apr 14, 2022
Verilog 4 Import of the demon core from SVN http://gadgetforge.gadgetfactory.net/svn/butterflylogic/trunk/Verilog_Core/ Jul 19, 2016
Verilog 4 Single-cycle and pipelined MIPS CPUs written for learning purpose. Written in 12 hours. Jun 21, 2022
Verilog 4 The AY-3-8500 Pong-on-a-chip for the Ulx3s ECP5 board Jul 18, 2022
Verilog 4 Version of Ice40Beeb for Ulx3s ECP5 board Jul 18, 2022
Verilog 4 ColecoVision console for the Ulx3s ECP5 board Jul 18, 2022